; ; Control Voltage to MIDI Converter ; ; (c) 1994 Mark F. Coniglio ; ; ; Reads pitch voltage from AD Input 1 ; Reads velocity voltage from AD Input 2 ; ; Port C Bit 0 is the Gate ; ; Sends out MIDI Note On/Note Off Commands ; REGBAS equ $B000 DDRC equ $B007 TCNT equ $B00E TOC1 equ $B016 TFLG1 equ $B023 SCSR equ $B02E SCDR equ $B02F SCCR1 equ $B02C SCCR2 equ $B02D BAUD equ $B02B COMM equ $BC00 ; base address of com port IER equ $BC00 CFR equ $BC01 ; write CSR equ $BC01 ; read TDR equ $BC03 ; write RDR equ $BC03 ; read PORTA equ $B000 PORTB equ $B004 PORTC equ $B003 PORTD equ $B008 eeprom equ $B600 PPROG equ $B03B b9600 equ $30 b31250 equ $20 ADCTL equ $B030 ADR1 equ $B031 ADR2 equ $B032 ADR3 equ $B033 ADR4 equ $B034 CCF equ $80 TDRE equ $80 SYNC equ $F5 BASECMD equ $A8 lastval equ $D0 lastnote equ $D1 start bra main ;******** ; sndnote: sends a note on with the pitch ; value in passed in register A ; ; Paramters: ; a = the pitch of the note ; b = the velocity (note off = 0) ; ;******** sndnote psha lda #$90 ; get the note on commnad bsr sendch ; send it pula ; pull pitch from stack bsr sendch ; send it tba ; put velocity into reg a bsr sendch ; and send it rts ; return to caller ;******** ; sendch: makes sure the transmit buffer is empty ; and then sends the character. makes sure that ; a never goes higher than our sync character ; ;******** sendch psha ; push a onto the stack chloop lda SCSR ; get the status register anda #TDRE ; see if TDRE flag is set beq chloop ; if not, go and try again pula ; pop a from the stack sta SCDR ; send the character exit rts ; exit subroutine ; warm up the line and prepare to send new data main lda #b31250 ; change to 31250 (MIDI) baud sta BAUD lda #0 sta DDRC ; init c to all inputs sta lastval ; clear last val loop lda PORTC ; get port c anda #$01 ; get low bit of c cmpa lastval ; compare to last state beq loop ; if the same, try again sta lastval ; remember last value tsta ; see if it is zero or one beq dooff ; if 0, do note off ; ; NOTE ON ROUTINE ; ; sample channels 1-4 and send bsr delay1 ; wait 1 ms before sampling bsr delay1 ; wait 1 ms before sampling bsr delay1 ; wait 1 ms before sampling lda #$10 ; scan channels 1-4 one time sta ADCTL ; start sampling ldx #REGBAS ; make sure x is set to 0 wait1 brclr ADCTL,x CCF wait1 ; wait for conversion complete lda ADR1 ; get the pitch from a/d reg 1 lsra ; divide by 2 sta lastnote ; store the last pitch we got ldb ADR2 ; get the velocity from a/d reg 2 lsrb ; divide by 2 bne velok ; if not zero inca ; force to at least 1 velok bsr sndnote ; send a note on bra loop ; go to the top ; ; NOTE OFF ROUTINE ; dooff lda lastnote ; store the last pitch we got clrb ; b = the velocity = 0 for note off bsr sndnote ; send a note off command bra loop ; go to the top ;******** ; delay1: delays 1 millisecond. ; ; all registers preserved ;******** delay1 pshx ; push x onto the stack ldx #333 ; 333 x 6 cycles @ 500ns/cycle = 1ms dloop dex ; decrement count bne dloop ; branch until count expired pulx ; pop x from stack rts ; exit subroutine